An embedded NV (non-volatile) memory is formed by integrating an NV memory device and a logic circuit for driving the NV memory device on a single chip, and is manufactured through a combination of basic logic and NV memory technologies.
Various types of embedded NV memories exist, and a proper embedded NV memory is used according to purposes thereof.
An embedded NV memory includes a single poly EEPROM (electrically erasable programmable read-only memory), in which a polycrystal silicon layer functioning as a gate is a single layer, a stack gate (ETOX), in which two polycrystal silicon layers are vertically stacked, a dual poly EEPROM which is an intermediate type between the single poly EEPROM and the stack gate, and a split gate.
The stack gate is suitable for a high density and high performance memory device and is not suitable for a low density memory device because it has the smallest cell size and a complicated circuit. The EEPROM is mainly used for a low density memory device. For example, the single poly EEPROM can be manufactured by simply adding two mask processes in a logic procedure, but it is not suitable for a high density memory device because it has a cell size greater than the stack gate by about 200 times.
The dual poly EEPROM, which is an intermediate type between the single poly EEPROM and the stack gate, and the split gate are disadvantageous in that their manufacturing process is complicated.